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| SCG4600 Synchronous Clock Generators PLL 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com General Description The SCG4600 is a digital phase locked loop generating CML outputs from an intrinsically low jitter voltage controlled crystal oscillator. The SCG4600 can lock to one of two external 8 kHz references, which is selectable using the SELAB input select pin. The unit has an acquisition time of about 1.5 seconds and it is tolerant of different reference duty cycles. The SCG4600 includes an alarm output that indicates deviations from normal operation. If a Lossof-Reference (LOR) or Loss-of-Lock (LOL) is detected the alarm with indicate the need for a reference rearrangement. If both references A and B are absent the module will enter Free Run operation. The FRstatus pin will indicate that the module is in Free Run operation. Frequency stability during Free Run operation is guaranteed to 20 PPM. Additionally the Free Run mode may be entered manually. The package dimensions are 1.05" x 1.03" x .375" (maximum) on a 4 layer FR4 board with J-Leads. Parts are assembled using high temperature solder to withstand 180C surface mount reflow processes. Features * Phase Locked Output Frequency Control * Intrinsically Low Jitter Crystal Oscillator * CML Outputs * Dual 8 kHz References * LOR & LOL Alarm. * Force Free Run Function * Automatic Free Run Operation on Loss of Both References A & B * Input Duty Cycle Tolerant * 3.3VDC Power Supply Bulletin Page Revision Date Issued By SG028 1 of 12 P01 19 July 02 MBatts Block Diagram Figure 1 Alarm Ref A Ref B 8 kHz Phase Aligner DPFD Analog Filter 38.88 MHz VCXO OC-12 PLL Q QN 1/N SEL AB Absolute Maximum Rating Table 1 Symbol Vcc Vi Ts Parameter Power Supply Voltage Input Voltage Storage Temperature Minimum -0.5 -0.5 -40.0 Nominal Maximum +4.0 +5.5 +85 Units Volts Volts C Notes 1.0 1.0 1.0 Operating Specifications Table 2 Symbol Vcc Icc To Fo Ffr Frefa Frefb Fcap Fbw Tjtol Taq Trf DC MTIEsr Parameter Power Supply Voltage Power Supply Current Temperature Range Minimum 3.135 0 Nominal 3.3 200 622.08 155.52 8 8 1.4 100 50 Maximum 3.465 70 20 25 3 6.25 55 Units Volts mA C MHz MHz ppm kHz kHz ppm Hz s s ps % ns 4.0 5.0 3.0 Notes 2.0 Available Output Frequencies Free Run Frequency Reference Frequency A Reference Frequency B Capture/pull-in range Jitter Filter Bandwidth Input Jitter Tolerance Acquisition Time Output Rise and Fall Time MTIE @ Synchronization Rearrangement -20 -25 - Output Duty Cycle (20% 80%) 45 NOTES: 1.0 Operation of the device at these or any other condition beyond those listed under Operating Specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability. 2.0 Requires external regulation and supply decoupling. (2.2 uF, 330 pF) 3.0 3db loop response. 4.0 From a 20 PPM step in reference frequency 5.0 CML outputs ac coupled into 50-ohm load to VCC. Preliminary Data Sheet #: SG028 Page 2 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Input And Output Characteristics Table 3 Symbol Parameter Minimum Nominal Maximum Units Notes CMOS Input and Output Characteristics Vih Vil Tio Cl Voh Vol Tir Vod High Level Input Voltage Low Level Input Voltage I/O to Output Valid Output Capacitance High Level Output Voltage Low Level Output Voltage Input Reference Pulse Width Differential Output Voltage 2.0 0.0 2.4 25.72 800 5.5 0.8 10 10 0.4 1200 V V ns pF V V ns mV 5.0 CML Output Characteristics Input Selection / Output Response Table 4 RESET 1 X 0 0 0 0 0 0 0 0 ENABLE 0 1 0 0 0 0 0 0 0 0 SELAB X X X 0 1 0 1 1 0 X INPUTS REFA X X X A A NA NA A A NA NOTES: A Active FR Free Run Mode NA Not Active HZ High Impedance REFB X X X A A A A NA NA NA FR X X 1 0 0 0 0 0 0 0 FRstatus 1 HZ 1 0 0 0 0 0 0 1 OUTPUTS ALARM X HZ 1 0 0 1 0 1 0 1 NOTE Q X X X X X X X X X X QN X X X X X X X X X X FR RA RB U RB U RA FR FR RA Locked to Reference A RB Locked to Reference B U Unstable (due to conditions shown, switch to active reference or Free Run) X Don't care Jitter Generation Specifications Table 5 Frequency (MHz) 155.52 SONET Jitter BW 12 kHz - 1.3 MHz pS (RMS) 2.2 Typ. SONET Jitter BW 12 kHz - 5 MHz pS (RMS) 622.08 1.9 Typ. Preliminary Data Sheet #: SG028 Page 3 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Pin Description Table 6 Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin Name ENABLE TCK TDO REFA SELAB RESET REFB GND FRstatus Vcc N/C ALARM FR TDI TMS QN GND Q All SCG4600 Models Pin Information CML Enable / CMOS Tri-State (Enable = 0, Disable = 1) No Connection, Internal Factory Programming Input. No Connection, Internal Factory Programming Input. CMOS Reference Frequency Input. Input Reference Select Pin. (REFA = 0, REFB = 1) RESET. (RESET = 1) CMOS Reference Frequency Input. Ground. Free Run Status. (FR = 1) Supply Voltage relative to ground. No Connection. Loss of Reference / Lock alarm. (Alarm = 1) Force Free Run. (Phase Lock = 0, Free Run = 1) No Connection, Internal Factory Programming Input. No Connection, Internal Factory Programming Input. Negative Differential CML Output. Ground. Positive Differential CML Output. 10.0 9.0 8.0 8.0 10.0 8.0 9.0 9.0 Note 9.0 8.0 8.0 NOTES 8.0 Do not connect pin 9.0 Input pulled to ground 10.0 CML Outputs are internally AC coupled Circuit Board Footprint Recommendations Figure 2 Mechanical Dimensions Figure 3 1.050 MAX [26.67mm] 0.855 0.100 0.045 0.055 1.030 [26.16mm] MAX. .100 [2.54mm] PIN 18 PIN 1 .950 [24.13mm] MAX. .018 [.46mm] 1.080 0.980 0.880 0.450 [11.43mm] MAX. 0.100 .090 [2.29mm] Preliminary Data Sheet #: SG028 Page 4 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Switch from A to B when both are good signals Figure 4 Ref A Ref B Alarm LOL portion of Alarm is blanked 0.5 sec Sel A/B New Reference Qualification time Switch from A to B when Reference B is lost Figure 5 Ref A Ref B ~5ns Alarm Sel A/B Preliminary Data Sheet #: SG028 Page 5 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Switch from A to B after Reference A is lost Figure 6 Ref A Ref B Alarm 125 - 250 s LOL Portion of Alarm is Blanked Sel A/B New Reference Qualification time Switch from A to B when A is out of range Figure 7 Ref A Ref B Alarm LOL Portion of Alarm is Blanked Out of Range In Range Sel A/B New Reference Qualification time Preliminary Data Sheet #: SG028 Page 6 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Switch from A to B when B is out of range Figure 8 Ref A Ref B Alarm LOL Portion of Alarm is Blanked In Range Out of Range Sel A/B New Reference Qualification time Preliminary Data Sheet #: SG028 Page 7 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Typical 622.08 MHz MTIE Measurement Figure 9 10.0E-9 MTIE (seconds) 1.0E-9 100.0E-12 100.0E-3 1.0E+0 10.0E+0 100.0E+0 1.0E+3 10.0E+3 Observation Window (Tau) (seconds) Typical 622.08 MHz TDEV Measurement Figure 10 1.0E-9 TDEV (seconds) 100.0E-12 10.0E-12 100.0E-3 1.0E+0 10.0E+0 Tau (seconds) 100.0E+0 1.0E+3 Preliminary Data Sheet #: SG028 Page 8 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Suggested Differential Output Termination Figure 13 3.3 VDC 3.3 VDC 3.3 VDC 50 Vcc Q Vcc D SCG4600 CML OUTPUT QN GND 50 OHM Transmission Line CML INPUT 50 OHM Transmission Line 50 DN GND 3.3 VDC 3.3 VDC Vcc - 2 VDC 3.3 VDC 50 Vcc Q Vcc D SCG4600 CML OUTPUT QN GND 50 OHM Transmission Line LVPECL INPUT 50 OHM Transmission Line 50 DN GND Vcc - 2 VDC 3.3 VDC 3.3 VDC Vcc Q Vcc SCG4600 CML OUTPUT QN GND 50 OHM Transmission Line 100 D LVDS INPUT DN GND 50 OHM Transmission Line Note: Driving a LVDS receiver, LVDS input must be internally biased into common mode range. LVDS input must be capable of receiving a differential voltage of 1.2 Vpp Preliminary Data Sheet #: SG028 Page 9 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Ordering Information SCG{XXXX}-{FFF.FFF}{M} XXXX equals a specific model (4600) FFF.FFF equals the CML Output frequency (155.52, 622.08 MHz) M equals MHZ and is added to all part numbers Example: To order an SCG4600 with an CML Output of 622.08 MHz, Order part number SCG4600-622.08M Please contact Connor-Winfield for other frequencies that may be available. Preliminary Data Sheet #: SG028 Page 10 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Preliminary Data Sheet #: SG028 Page 11 of 12 Rev: P01 Date: 07/19/02 (c) Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Revision P00 P01 Revision Date 01/17/01 7/19/02 Note Preliminary informational release Added new frequency & refomatted |
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